JPH0639467Y2 - Ｌｅｄ表示素子 - Google Patents
Ｌｅｄ表示素子Info
- Publication number
- JPH0639467Y2 JPH0639467Y2 JP1989023555U JP2355589U JPH0639467Y2 JP H0639467 Y2 JPH0639467 Y2 JP H0639467Y2 JP 1989023555 U JP1989023555 U JP 1989023555U JP 2355589 U JP2355589 U JP 2355589U JP H0639467 Y2 JPH0639467 Y2 JP H0639467Y2
- Authority
- JP
- Japan
- Prior art keywords
- reflector
- lead frame
- display element
- led
- reflecting surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000011347 resin Substances 0.000 claims description 23
- 229920005989 resin Polymers 0.000 claims description 23
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Illuminated Signs And Luminous Advertising (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989023555U JPH0639467Y2 (ja) | 1989-03-01 | 1989-03-01 | Ｌｅｄ表示素子 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989023555U JPH0639467Y2 (ja) | 1989-03-01 | 1989-03-01 | Ｌｅｄ表示素子 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02114954U JPH02114954U (en]) | 1990-09-14 |
| JPH0639467Y2 true JPH0639467Y2 (ja) | 1994-10-12 |
Family
ID=31242645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989023555U Expired - Fee Related JPH0639467Y2 (ja) | 1989-03-01 | 1989-03-01 | Ｌｅｄ表示素子 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0639467Y2 (en]) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5310288U (en]) * | 1976-07-09 | 1978-01-27 | ||
| JPS5824453Y2 (ja) * | 1978-05-11 | 1983-05-25 | 三洋電機株式会社 | 発光ダイオ−ド基板 |
| JPS6125267Y2 (en]) * | 1980-02-19 | 1986-07-29 | ||
| JPS59128753U (ja) * | 1983-02-17 | 1984-08-30 | オムロン株式会社 | 面発光装置 |
| JPS59189686A (ja) * | 1983-04-13 | 1984-10-27 | Rohm Co Ltd | 表示装置 |
-
1989
- 1989-03-01 JP JP1989023555U patent/JPH0639467Y2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02114954U (en]) | 1990-09-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |